职位详细信息

AMD Image Signal Processor (ISP) team has immediate opening of MTS/SMTS ASIC verification engineer. The successful candidate would be hired in as staff or senior staff engineer level， with the expectation that they would have verification experience in the multimedia， image processing or similar industry. A candidate that has a strong image science background with a focus on image signal processing (ISP) is highly desirable. RESPONSIBILITIES: - Understand ISP hardware architecture and functional block being designed - Build C/C++/UVM model for simulation， build test bench and monitors for block test environment - Participate in block level and IP subsystem level verification work， simulate and debug the codes in coding stage - Compose ASIC specific part of test plan， work with algorithm， firmware and FPGA engineers to prove functional correctness from block level to IP subsystem level - Support camera SW， FW and diagnostics team for pre-silicon and post-silicon debugging - Maintain verification environment， solve flow issues， and develop scripts to improve flow efficiency. - Collaborate and interface with local and global management to make accountable deliverables on time REQUIREMENTS: - BS-CS/BS-EE with at least 7 years' experience or MS with at least 5 years' experience in ASIC/SoC verification - Hand-on experience in all domains of complex ASIC DV flow from plan to coverage - Experience with design for verification (assertion based design strategies， code coverage， functional coverage， test plan， gate-level simulation， back-annotation etc.) - Good knowledge on verification methodologies like UVM is a big plus - Good knowledge of multimedia/video/camera related image processing - Experience in power-aware verification is an asset - Strong individual analysis， problem solving skills and teamwork attitude - Experience of working with multi-site teams is preferred 职能类别： IC验证工程师 微信分享